1. Field of the Invention
The present invention relates to a liquid crystal display device which includes a plurality of sub-picture element electrodes in one picture element area, and which inhibits a phenomenon in which a screen looks whitish when the screen is looked at in a diagonal direction.
2. Description of the Prior Art
Liquid crystal display devices are thinner and lighter in weight, and can be driven with lower voltage, consuming less power, than CRTs (Cathode Ray Tubes). For this reason, liquid crystal display devices are used for various electronic appliances, including television receivers, note PCs (personal computers), desktop PCs, PDAs (personal digital assistances) and mobile phones.
In general, each liquid crystal display device is configured of two substrates and liquid crystal filled in an interstice between the two substrates. On one substrate, a picture element electrode, a thin film transistor (hereinafter referred to as a “TFT”) and the like are formed in each picture element. On the other substrate, color filters and a common electrode common among the picture elements are formed. Hereinafter, a substrate on which picture electrodes and TFTs are formed is referred to as a “TFT substrate, and a substrate arranged opposite to the TFT substrate is referred to as a “facing substrate.” In addition, a structure where the liquid crystal is filled in the interstice between the TFT substrate and the facing substrate is referred to as a “liquid crystal panel.”
TN (twisted nematic)-type liquid crystal display devices have been heretofore used widely. In the case of the TN-type liquid crystal display devices, a horizontal alignment type of liquid crystal (liquid crystal with a positive dielectric anisotropy) is filled in the interstice between the two substrates, and molecules of the liquid crystal are twisted and aligned. However, the TN-type liquid crystal display devices have a disadvantage that their viewing angle characteristics are poor so that their contrast and color tones vary greatly when their screens are looked at in a diagonal direction. For this reason, MVA (multi-domain vertical alignment)-type liquid crystal display devices each with a better viewing angle characteristic have been developed, and have been put in practical use.
However, in the case of the conventional type of MVA-type liquid crystal display devices, a phenomenon in which the screen looks whitish occurs when the screen are looked at in a diagonal direction. FIG. 1 is a diagram showing a T-V (transmittance-voltage) characteristic observed when the screen is looked at from the front, and a T-V characteristic observed when the screen is looked at from above at an angle of 60 degrees to the screen, where the axis of abscissas indicates applied voltage (V) and the axis of ordinates indicates transmittance. As shown in FIG. 1, when a voltage slightly higher than a threshold voltage is applied to a picture element electrode (a part encircled in the figure), transmittance observed when the screen is looked at in the diagonal direction is higher than transmittance observed when the screen is looked at from the front. In addition, when the applied voltage becomes higher to some extent, the transmittance observed when the screen is looked at in the diagonal direction becomes lower than the transmittance observed when the screen is looked at from the front. For this reason, the difference in luminance among the red, green and blue picture elements which is observed when the screen is looked at in the diagonal direction becomes smaller. As a result, the phenomenon in which the screen looks whitish occurs as described above. This phenomenon is termed as “wash-out.” The wash-out occurs not only in the MVA-type liquid crystal display devices but also in the TN-type liquid crystal display devices.
The specification of U.S. Pat. No. 4,840,460 has proposed a TN-type liquid crystal display device in which one picture element is divided into a plurality of sub-picture elements, and in which these sub-picture elements are capacitance-coupled to one another. In the case of the liquid crystal display device of this kind, electric potential is divided depending on capacitance ratios respectively of the sub-picture elements. For this reason, mutually different voltages are applicable respectively to the sub-picture elements. As a result, a plurality of domains which are different from one another in the threshold value of the T-V characteristic are apparently present in one picture element. If the plurality of domains which are different from one another in the threshold value of the T-V characteristic are present in one picture element in this manner, T-V characteristics respectively of those domains are averaged. This inhibits a phenomenon in which the transmittance observed when the screen is looked at in the diagonal direction becomes higher than the transmittance observed when the screen is looked at from the front. As a result, the phenomenon in which the screen looks whitish when the screen is looked at in the diagonal direction (wash-out) is also inhibited. The method of improving the display characteristic by dividing one picture element into the plurality of domains which are different from one another in the T-V characteristic is termed as a “HT (halftone grayscale) method.
FIG. 2 is a plan view showing an example of the conventional type of liquid crystal display device realizing the HT method. FIG. 3 is a cross-sectional view of the conventional type of liquid crystal display device taken along the I-I line of FIG. 2. Incidentally, FIG. 2 shows an area equivalent to one picture element of the liquid crystal display device.
A plurality of gate bus lines 52 each extending in the horizontal direction (the X-axis direction) and a plurality of data bus lines 55 each extending in the vertical direction (the Y-axis direction) are formed on a glass substrate 51 serving as the base of the TFT substrate. Each of rectangular areas defined by the gate bus lines 52 and the data bus lines 55 is a picture element area. In addition, auxiliary capacitance bus lines 53 are formed on the glass substrate 51. The auxiliary capacitance bus lines 53 are arranged in parallel to the gate bus lines 52. Each of the auxiliary bus lines 53 cuts across the center of each of the picture element areas.
A first insulating film 54 is formed between a level where the gate bus lines 52 and the auxiliary capacitance bus lines 53 are formed and a level where the data bus lines 55 are formed. By the first insulating film 54, the gate bus lines 52 and the auxiliary capacitance bus lines 53 are electrically separated from the data bus lines 55.
A TFT 56, a control electrode 57, an auxiliary capacitance electrode 58, and sub-picture element electrodes 61a and 61b are formed in each of the picture element areas. In the case of this example, as shown in FIG. 2, a part of the gate bus line 52 is a gate electrode of the TFT 56. In addition, as shown in FIG. 3, a semiconductor film 56a which will serves as an active layer for the TFT 56 is formed above the gate bus line 52. A channel protection film 56b is formed on this semiconductor film 56a. 
As shown in FIG. 2, a drain electrode 56d of the TFT 56 is connected to the data bus line 55, and a source electrode 56s thereof is arranged in a position opposite to the drain electrode 56d with the gate bus line 52 interposed in between. In addition, the auxiliary capacitance electrode 58 is arranged in a position opposite to the auxiliary capacitance bus line 53 with the first insulating film 54 interposed in between. Moreover, the control electrode 57 is electrically connected to the source electrode 56s and the auxiliary capacitance electrode 58 through an interconnect 59.
The data bus line 55, the TFT 56, the control electrode 57, the auxiliary capacitance electrode 58 and the interconnect 59 are covered with a second insulating film 60. The sub-picture element electrodes 61a and 61b are formed on the second insulating film 60. The sub-picture element electrode 61a is capacitance-coupled to the control electrode 57 (including a part of the interconnect 59 under the sub-picture element electrode 61a) with the second insulating film 60 interposed in between. In addition, the sub-picture element electrode 61b is electrically connected to the auxiliary capacitance electrode 58 through a contact hole 60a made in the second insulating film 60. The surfaces respectively of the sub-picture element electrodes 61a and 61b are covered with an alignment film 62.
On the other hand, as shown in FIG. 3, color filters 72 are formed on a surface (on the lower side in FIG. 3) of a glass substrate 71 serving as the base of a facing substrate. A common electrode 73 is formed on the color filters 72 (on the lower surface thereof in FIG. 3). The surface of the common electrode 73 is covered with an alignment film 74.
The TFT substrate and the facing substrate are arranged with spacers (not illustrated) interposed in between. Liquid crystal 80 is filled in the interstice between the TFT substrate and the facing substrate. Thus, a liquid crystal panel is completed. Polarizers are arranged on the two sides of this liquid crystal panel in the thickness direction thereof. A drive circuit and a backlight (neither of them is illustrated) are attached thereto. Thus, the liquid crystal display device is completed.
In the case of the liquid crystal display device configured in this manner, when a scanning signal supplied to the gate bus line 52 becomes active (“1”), the TFT 56 is turned on. Thus, a display signal supplied to the data bus line 55 is transferred to the control electrode 57 and the sub-picture element electrode 61b. The display signal supplied to the control electrode 57 is transferred to the sub-picture element electrode 61a through capacitance coupling. In this case, the voltage of the sub-picture element electrode 61a becomes lower than that of the sub-picture element electrode 61b by an amount equivalent to the capacitance coupling. For this reason, two domains which are different from each other in the T-V characteristic are apparently present in one picture element area. This inhibits a phenomenon in which the screen looks whitish when the screen is looked at in the diagonal direction.
However, in the case of the liquid crystal display device shown in FIG. 2, if the sizes of the control electrode 57 and the interconnect 59 vary in the photolithography step, a capacitance value between the control electrode 57 (including the part of the interconnect 59 under the sub-picture element electrode 61a) and the sub-picture element electrode 61a changes. Thus, the liquid crystal display device has a problem that display unevenness occurs.
In addition, the conventional type of liquid crystal display device shown in FIG. 2 has a problem that image sticking occurs as well. For example, if a halftone display is made after a black-and-white checkered pattern is continuously displayed on the entire screen for a certain length of time, the checkered pattern looks lighter in color due to the image sticking.
Usually, the image sticking of the liquid crystal display device stems from the following causes. One cause is that a direct-current component is present in signals flowing to the gate bus lines, the data bus lines and the like. The other cause is that the C and R values (the values respectively of the liquid crystal capacitance and the liquid crystal resistance) of the liquid crystal layer during white display are different from those during black display. Descriptions will be provided below for the reasons why the image sticking occurs in the liquid crystal display device as shown in FIGS. 2 and 3.
FIG. 4 is a plan view showing one picture element of the liquid crystal display device realizing the HT method. FIG. 5A is a schematic cross-sectional view of the picture element taken along the II-II line of FIG. 4. FIG. 5B is a schematic cross-sectional view of the picture element taken along the III-III line of FIG. 4. FIG. 5C is a schematic cross-sectional view of the picture element taken along the IV-IV line of FIG. 4. FIG. 5D is a schematic cross-sectional view of the picture element taken along the V-V line of FIG. 4.
In the case of the liquid crystal display device shown in FIG. 4, as shown in FIG. 5A, CLC2 and RLC2 can be regarded as being connected in parallel between the sub-picture element electrode 61a and the common electrode 73. In this respect, CLC2 denotes a capacitance between the sub-picture element electrode 61a and the common electrode 73, and RLC2 denotes a resistance between the sub-picture element electrode 61a and the common electrode 73.
In addition, Cgpx2 and Rgoff can be regarded as being connected in parallel between the sub-picture element electrode 61a and the gate bus line 52 as well. In this respect, Cgpx2 denotes a capacitance between the sub-picture element electrode 61a and the gate bus line 52, and Rgoff denotes a resistance between the sub-picture element electrode 61a and the gate bus line 52.
On the other hand, as shown in FIG. 5B, CLC1 and RLC1 can be regarded as being connected in parallel between the sub-picture element electrode 61b and the common electrode 73 as well. In this respect, CLC1 denotes a capacitance between the sub-picture element electrode 61b and the common electrode 73, and RLC1 denotes a resistance between the sub-picture element electrode 61b and the common electrode 73.
Furthermore, Cgpx1 and Rgpx1 can be regarded as being connected in parallel between the sub-picture element electrode 61b and the gate bus line 52 as well. In this respect, Cgpx1 denotes a capacitance between the sub-picture element electrode 61b and the gate bus line 52, and Rgpx1 denotes a resistance between the sub-picture element electrode 61b and the gate bus line 52.
A direct-current voltage (Vgoff) of approximately −5V to −10V is applied to the gate bus line 52 for almost all the length of time in one vertical synchronization period (one field period) (while the scanning signal is inactive) for the purpose of keeping the TFT 56 in the OFF state. An electric charge depending on this direct-current voltage is accumulated in each of the sub-picture element electrodes 61a and 61b respectively through a group of the capacitance Cgpx2 and the resistance Rgoff or a group of the capacitance Cgpx1 and the resistance Rgpx1.
Usually, scanning signals applied to each of the gate bus lines 52 sequentially become active once in each vertical synchronization period. At this time, the TFT 56 is turned on. Thus, the sub-picture element electrode 61b and the data bus line 55 are electrically connected to each other. For this reason, the electric charge, which has been accumulated in the sub-picture element electrode 61b while the TFT 56 is off, flows to the data bus line 55, and thus the direct-current voltage component does not remain in the sub-picture element electrode 61b. On the other hand, even if the TFT 56 is turned on, the electric charge accumulated in the sub-picture element electrode 61a is held as it is in the sub-picture element electrode 61a. For this reason, the direct-current voltage component remains in the sub-picture electrode 61a. 
Furthermore, as shown in FIG. 5C, Cdpx2 and Rdpx2 can be regarded as being connected in parallel between the sub-picture element electrode 61a and the data bus line 55. In this respect, Cdpx2 denotes a capacitance between the sub-picture element electrode 61a and the data bus line 55, and Rdpx2 denotes a resistance between the sub-picture element electrode 61a and the data bus line 55.
Moreover, as shown in FIG. 5D, Cdpx1 and Rdpx1 can be regarded as being connected in parallel between the sub-picture element electrode 61b and the data bus line 55 as well. In this respect, Cdpx1 denotes a capacitance between the sub-picture element electrode 61b and the data bus line 55, and Rdpx1 denotes a resistance between the sub-picture element electrode 61b and the data bus line 55.
In the data bus line 55, a direct-current voltage higher than the electric potential of the common electrode 73 by approximately 1V to 2V is superimposed on a display signal (alternating current signal) for the purpose of compensating for a field-through voltage. An electric charge depending on this direct-current voltage is also accumulated in the sub-picture element electrodes 61a and 61b respectively through a group of the capacitance Cdpx2 and the resistance Rdpx2 or a group of the capacitance Cdpx1 and the resistance Rdpx1.
As described above, the TFT 56 is turned on once in each vertical synchronization period, and thus the sub-picture element electrode 61b and the data bus line 55 are electrically connected to each other. At this time, the electric charge accumulated in the sub-picture element 61b flows to the data bus line 55, and accordingly the direct-current voltage component does not remain in the sub-picture element electrode 61b. On the other hand, the electric charge accumulated in the sub-picture element 61a is held as it is in the sub-picture element 61a, even when the TFT 56 is turned on. For this reason, the direct-current voltage component remains in the sub-picture element electrode 61a. 
In this manner, almost no direct-current voltage component is accumulated in the sub-picture element electrode 61b which is electrically connected to the data bus line 55 through the TFT 56 in certain periods. By contrast, the electric charge is accumulated in the sub-picture element electrode 61a capacitance-coupled to the control electrode 57, and accordingly the direct-current voltage component remains there.
Next, descriptions will be provided for a relationship between the electric charge accumulated in the sub-picture element electrode 61a and the image sticking.
When the area and cell thickness of the sub-picture element electrode 61a are denoted respectively by S and d, the capacitance (liquid crystal capacitance) CLC2 between the sub-picture element electrode 61a and the common electrode 73 is expressed as follows.CLC2=∈(S/d)where ∈ denotes a dielectric constant of the liquid crystal. The dielectric constant of liquid crystal molecules aligned in a direction perpendicular to the substrate surface is different from the dielectric constant of liquid crystal molecules aligned in the horizontal direction. For this reason, a value of the liquid crystal capacitance of a picture element displaying a white part of a checkered pattern is different from a value of the liquid crystal capacitance of a picture element displaying a black part of the checkered pattern. As a result, a value of the direct-current voltage component applied to a part of a liquid crystal layer which corresponds to the white display is different from a value of the direct-current voltage component applied to a part of the liquid crystal layer which corresponds to the black display. Even if the checkered-pattern display is switched to a halftone display, the direct-current voltage components remaining respectively in the two parts of the liquid crystal layer do not change quickly. For this reason, the voltage applied to the part of the liquid crystal layer in the picture element displaying white is different from the voltage applied to the part of the liquid crystal layer in the picture element displaying black. As a result, the light transmittance of the picture element displaying white is different from the light transmittance of the picture element displaying black. This causes the image sticking. Incidentally, the image sticking stemming from such a cause decreases in a length of time depending on a time constant between the sub-picture element electrode and a group of the control electrode and the common electrode. However, for the purpose of enhancing the display quality, the image sticking needs to be made as small as possible.